Where is the Industry heading :
The Future of VLSI
Without semiconductors, the world would be a really different place; we’d not have any electronic calculators, microwave ovens, digital alarm clocks, cellphones, personal computers, electronically controlled transmissions, or washing machines. The Semiconductor Industry is poised for strong growth with developments in AI piling on demand for next generation silicon and technological innovation. Sales are expected to continue growing and reach $572 billion by 2022.
Today, VLSI devices are found everywhere around us. We find advanced VLSI chips in our cars, cell phones, household appliances, cameras, medical devices and much of other places. With the advances being made in technologies like process geometries, feature and product innovations on a day to day , there’s a continuing got to design, develop and re-engineer integrated circuits (ICs). Since products like mobile phones are being released with new features in increasingly shorter cycles, there’s a healthy demand to figure on these products. The introduction of 5G and related technologies are also going to drive the use of more powerful semiconductor chips across the communications market. At the same time, new televisions, handheld devices, gaming consoles, and digital set-top boxes will further drive demand for more powerful semiconductors for consumer electronics.
Moore’s law : A hurdle or a warning
The basic law that the VLSI industry runs on: The Moore’s law which states that the number of transistors per silicon chip doubles every two years is coming to an end. The law which defines the entire trajectory of the Tech industry. The number of transistor on the same area is proving to be a challenge. The predictions are increasing as lithography advances stall and process technology approaches atomic limits. Robert Colwell who seeks follow-on technologies as director of the microsystems group at the Defense Advanced Research Projects Agency stated in one of his interviews “Moore’s Law was a rare exponential protein that over 30 years brought speed boosts from 1 MHz to 5 GHz, a 3,500-fold increase. By contrast, the only advances in clever architectures delivered about 50x increases over the same period” Exponentials always come to an end by the very nature of their unsustainably heady growth. Unfortunately, such rides are rare, Colwell added.
The worldwide demand for performance-driven by telecommunications, the web , corporate networking and improved human interfaces-is increasing faster than the speed of the historical improvement in VLSI IC performance as described by Moore’s Law. Internet traffic itself is increasing at five times the performance of ICs. Even more disturbing is that the new generation of microprocessors offers only a marginal advantage over the previous one, despite the main improvements in transistor speed wrought by next generation-process technology. The conclusion is that the IC itself is at the idea of the matter .
Coronavirus: Impact on global demand
The COVID-19 crisis is unprecedented in our time. While the recession during the financial crisis from 2007 to 2008 was driven by stagnating consumer demand, the COVID-19 situation induced a shock to both global demand and provide , creating a dual challenge. This unique phenomenon makes it difficult to extrapolate from past crises to form predictions how semiconductor demand will shift within the short- and mid-term — taking under consideration extensive surveys, research on the recovering Chinese market, and global GDP projections. Based on the 2 scenarios we evaluated, we expect demand to say no by 5 to fifteen percent for the semiconductor industry as an entire this year compared to 2019 The VLSI microcircuit as we all know it’s nearing its end of life. The end of the VLSI era exposes immense opportunities to satisfy the long run demands of the electronics market. Consider that every of the thousands of digital IC types is meant , manufactured and sold independently. That worked within the past because each IC carried an interface burden that made it a standalone device. But it’s now become the limitation on increasing system-level bandwidth. A new kind of implementing digital systems overcomes the interface limitations of the microcircuit by eliminating the IC interface on the digital core function. The first such attempts, systems-on-chip, combined such cores because the cache and processor or graphics accelerators and DRAM, and proved that core-to-core interfaces end during a dramatic increase in performance. This is where our imagination saves the day!
Imagination to the rescue!
A three-dimensional microcircuit (3D IC) may be a MOS (metal-oxide semiconductor) microcircuit manufactured by stacking Silicon wafers or dies and interconnecting them vertically using, as an example , through silicon vias (TSVs) or Cu-Cu connections, in order that they behave as one device to realize performance improvements at reduced power and smaller footprint than conventional two dimensional processes. The 3D IC is one among several 3D integration schemes that exploit the z-direction to realize electrical performance benefits in microelectronics and nanoelectronics.
3D integrated circuits are often classified by their level of interconnect hierarchy at the worldwide (package), intermediate (bond pad) and native (transistor) level. In general, 3D integration may be a broad term that has such technologies as 3D wafer-level packaging (3DWLP); 2.5D and 3D interposer-based integration; 3D stacked ICs (3D-SICs); monolithic 3D ICs; 3D heterogeneous integration; and 3D systems integration.
International organizations like the JISSO Technology Roadmap Committee (JIC) and therefore the International Technology Roadmap for Semiconductors (ITRS) have worked to classify the varied 3D integration technologies to further the establishment of standards and roadmaps of 3D integration. As of the 2010s, 3D ICs are widely used for NAND non-volatile storage and in mobile devices
3D Stacking vs. 3D packaging:
3D Packaging refers to 3D integration schemes that believe traditional methods of interconnect like wire bonding and flip chip to realize vertical stacks. 3D packaging can be disseminated further in 3D system in package (3D SiP) and 3D wafer level package (3D WLP), Stacked memory die interconnected with wire bonds, and package on package (PoP) configurations interconnected with either wire bonds, or flip chips are 3D SiPs that are in mainstream manufacturing for a few time and have a well established infrastructure. PoP is employed for vertically integrating disparate technologies like 3D WLP uses wafer level processes like redistribution layers (RDL) and wafer bumping processes to make interconnects.
2.5D interposer is additionally a 3D WLP that interconnects die side-side on a silicon, glass or organic interposer using TSVs and RDL. In all sorts of 3D Packaging, chips within the package communicate using off-chip signaling, very much like if they were mounted in separate packages on a traditional circuit card .
3D ICs are often divided into 3D Stacked ICs (3D SIC), which refers to stacking IC chips using TSV interconnects, and monolithic 3D ICs, which use fab processes to understand 3D interconnects at the local levels of the on-chip wiring hierarchy as set forth by the ITRS, this leads to direct vertical interconnects between device layers. The first samples of a monolithic approach are seen in Samsung’s 3D V-NAND devices. As of the 2010s, 3D IC packages are widely used for NAND non-volatile storage in mobile devices.
VLSI for engineers:
Semiconductor industry today must be more agile than ever to stay competitive. The main aim is to continuously improve efficiency and effectively attract consumers. Many semiconductor companies are already utilizing digital tools to realize competitive advantage throughout the merchandise life cycle. This rapidly evolving sector offers exciting opportunities in verification based jobs for those with strong fundamentals in electronic circuit design and hardware description languages, interest in VLSI design and verification and more importantly, the skill to place know-how of VLSI concepts to practice.
The Indian electronics system design space has gathered tons of steam within the previous couple of years. The semiconductor design market in India is expected to grow at around 25 per cent CAGR from US$ 9.9 billion in 2012 to US$ 60 billion in 2020 While the Indian electronics system design and manufacturing industry as an entire is import-dependent, to plug the large demand gap and lags in manufacturing, design services are still its key strength and are majorly domestic. This area has potential that remains untapped. Therefore there is good scope for a career in the VLSI industry.
To further our knowledge on all the information, we conferred with an alumnus of VIT, Pune. Prannoy Ghosh, who works as a Silicon Validation engineer at Intel, Oregon. Has majored in Computer architecture, Operating Systems and Digital System design stated, The VLSI industry has dug deep only one subdomain, i.e. silicon technology! Rest of the domains (software architecture, parallelism, virtual memory/cores, security, ASIC, system design, etc.) the industry has merely scratched the surface! Industry is exploring data science methods to know VLSI and generate new insights which will assist them to get higher profits. On the opposite hand, research community has already understood the performance limitations provided by the software. Hardware-software co-design is providing good return in performance on each design from generation to generation (check Nvidia, Intel, IBM generation trends). Customized ASIC or FPGA are being developed to supply higher performance for segmented markets. (bitcoins, autonomous vehicles, for examples). Vertical efforts in sub-domains of VLSI has began to see some rapid changes (GPU/ML Accelerators). However, these vertical efforts requires specialized skills and understanding across the industries. AI/ML is yet to succeed in VLSI (for example, power estimation and sleep state changes are often learned over time using ML models in PMU or area estimations are often quickly converged using inference algorithms or better access pattern for prefetching are often deployed and lots of more). A lot goes to vary when AI/ML starts integrating with VLSI!
Thus, the future is bright and exciting !!!
Authors- Priyanka Ghosh, Sudarshan Deshmukh, Aman Deshmukh
Thank you to Dr. Prof. Swati Shilaskar ma’am for her guidance and Prannoy Ghosh for his valuable inputs.
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